A Quantitative Wafer-level Electromigration Test for the Detection of Open and Short Circuit Failures.

A test circuit has been designed and fabricated to evaluate metallization reliability regarding electromigration failure at the wafer level. The basic current-carrying circuit is of the parallel conductor type and uses a constant voltage across the chip to simultaneously maintain a constant current density through each line. Additional circuitry has been built around it to enable one to detect inter- and intra-level short circuit failures. Due to the nature of the tester, many lines are able to be stressed at once and a statistically valid failure distribution can be measured in a fraction of the time normally spent when stressing individual lines with constant current sources. Because of this, lower acceleration factors of temperature and current density can be used, enabling a better extrapolation of the accelerated test conditions to standard operating conditions. The test chip can readily be integrated onto a test vehicle for the on-line evaluation of metallization- dielectric reliability. The circuit has been designed for compatibility with standard CMOS processing. The circuit layout will be described along with the necessary equipment and the techniques used to obtain the data.