A Synchronization Algorithm for Packet MANs

We describe the design, implementation, and experimental evaluation of a clock recovery algorithm suitable for synchronization over a packet-based metro-area network (MAN) using the protocol based on the IEEE1588v2 specification. The algorithm consists of a packet-based phase error estimator and a phase-locked loop (PLL). 

The loop is augmented with a step detector that detects discontinuities in the packet arrival process due to route or network load changes and a congestion detector filters out unusable samples. The PLL requires a number of interesting tradeoffs that are specific for high noise environment, while the congestion and step detector are non-traditional mechanisms specifically designed to deal with peculiarities of a packet network.