Design of a Reconfigurable UMTS Channel Processing Engine
01 January 2004
With difficult-to-predict traffic demands, the requirement to support multiple air interfaces and constantly evolving standards, the Software Defined Radio (SDR) has been proposed as a flexible alternative to todays fixed ASIC/FPGA imlementation fabric for cellular basestations. This work investigates the implementation of a highly configurable UMTS physical layer processing engine on a runtime reconfigurable platform (e.g. an FPGA with multiple run-time configurations). The implementation is designed to leverage both static configuration and run-time or dynamic reconfiguration. Static configuration is used for system parameters which are installation dependent but do not vary at run-time, for example the installations cell size. Dynamic reconfiguration is used to react to system variable which change at run-time, for example the mix between voice and data calls. Results suggest that leveraging the ability to instantiate the precise system required when targeting reconfigurable logic produces significant resource savings: 42% and greater.