Dry etching for nanometer-scale fabrication.

01 January 1984

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Using e-beam lithography and reactive ion etching, patterns down to about 20nm have been made in tri-level stencils and in semiconductor substrates. Working silicon MOSFETs with gate widths down to about 40nm have also been made. These MOSFET devices are so small that individual electron trapping events can be observed. Techniques for fabricating these devices and structures as well as their applications to the study of submicron physics will be discussed.