Examination of Pitting Formation in Rapid Thermal Annealing of Self-Aligned GaAs MESFET's.

01 January 1989

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Pitting at the periphery of refractory gates was observed following rapid thermal annealing (RTA) of capped self-aligned GaAs MESFETs. The pitting was attributed to the presence of microcracks in cap layer at the gate edges and to the enhanced outdiffusion of Ga and As at the interface between the gate edge and the cap layer. RTA with an arsenic overpressure, using arsine as a source, prohibited pitting and surface degradation in both capped and uncapped wafers. Higher mobilities were obtained for the ion implanted wafers annealed caplessly with arsenic overpressure, rather than for the wafers capped with SiO sup 2 or PSG. Conversely, higher activation was measured for the capped wafers, rather than for uncapped ones. Both effects can be related to preferential Ga outdiffusion into the capping layer resulting in the formation of Ga vacancies. The increased presence of Ga vacancies reduces mobility, but enhances activation since they serve as substitutional sites for Si dopants.