Fork - A Floorplanning Expert for Custom VLSI Design.

This paper describes the floorplanning expert, Fork, being developed for the Cadre custom chip-layout system. Fork is a set of tools, which perform tasks such as the floorplan construction, the floorplan evaluation, the floorplan improvement, the floorplan fine-tuning, the structural constraint compliance and solving, and the user interaction, acting collectively as an agent to the Cadre system. Each of these tools is based on two common floorplan representations, namely, the FP-graph floorplan representation, and the triangular-face representation. Fork generates a rectangular partition of the silicon area subject to the structural constraints, such as I/O positions and aspect ratios of circuit modules, specified by the designer and also to the structural constraints generated during the Cadre design cycle.