Fundamental Limits of VLSI

Since the beginning of the integrated-circuit era in 1958, the minimum device dimension for commercial integrated circuits has been reduced at an annual rate of about 13%. At this rate, the minimum device dimensions will shrink to 0.5 micron in the year 1990 and to 0.1 micron around year 2000. Assuming that the advanced technology required to fabricate submicron or even smaller devices can be developed, what are the fundamental limits of device dimensions based on physical laws. This talk will consider these fundamental limits in terms of intrinsic device limitations (e.g., tunneling, degeneracy limit, kT limit, quantum limits, and material limits), wiring limitations (e.g. electromigration, edge capacitance and wire resistance), and thermal limitations (e.g. packaging and power dissipation). We will show a number of working 1 micron integrated circuits and explore a few novel submicron device structures.