Integration and electrical isolation in CMOS mixed-signal wireless chips

The technological trends underlying the application of CMOS technology in wireless applications are leading to the integration of the RF analog functions and the digital baseband processing into a single chip. Two key technical requirements for this integration are the capability to fabricate high Q passive components and the need to maintain electrical isolation between analog and digital components in the resulting mixed-signal chip. Some basic arguments that illustrate the technological conflict between these two important demands are presented, focusing on their implications for the structure of the IC substrate. This structure and the characteristics of the device package play important roles in determining the levels of coupled ground noise that will be present in the mixed-signal IC. A simple, high-level model for coupled ground noise is presented and used to illustrate the impact of design alternatives for the package and for the IC substrate.