Intrinsic limitations on ultimate device performance and reliability at (i) semiconductor-dielectric interfaces and (ii) internal interfaces in stacked dielectrics

The scaling of electrical oxide thickness to 1.0 nm and below for advanced silicon devices requires a change from thermally grown oxides and nitrided oxides to deposited dielectrics which have dielectric constants, k, significantly greater than that of silicon dioxide, k(0)similar to 3.8. Implementation of the higher-k dielectrics into field effect transistor devices requires a processing protocol that provides separate and independent control over the properties of the Si-dielectric interface and the bulk dielectric film. Experiments to date have shown that plasma-grown nitrided oxides, similar to 0.5-0.6 nm thick, satisfy this requirement. This paper addresses chemical bonding issues at the Si-dielectric interface and at the internal dielectric interface between the plasma-grown nitrided oxides and the high-k alternative dielectrics by applying constraint theory. Si-SiO(2) is a prototypical interface between a ``rigid{''} Si substrate and a ``floppy{''} network dielectric, SiO(2), and the interfacial properties are modified by a monolayer-scale transition region with excess suboxide bonding over what is required for an ideal interface. Additionally, the defect properties at the internal interface between a nitrided SiO(2) interface layer and a bulk dielectric film reflect differences in the average number of bonds/atom N(av), of the dielectrics on either side of that interface. Experimentally determined interfacial defect concentrations are shown to scale quadratically with increasing differences in N(av) thereby establishing a fundamental basis for limitations on device performance and reliability. (C) 2000 American Vacuum Society. {[}S0734-211X(00)08204-4].