ASIP Architecture Driven Algorithm Development

Application-Specific Instruction-set Processor (ASIP) is seen as an ideal solution for realizing physical layer signal processing functions in communication systems as they can offer performance similar to hard-wired implementations, while providing sufficient flexibility/programmability. Several design choices needs be made while developing an algorithm (application) for a signal processing function, such as the selection of the algorithm itself, choice of the mathematical functions and the numerical precision of computation, that affects the signal processing performance and the throughput, area and power consumption of a corresponding ASIP. Traditionally, the algorithm development and the ASIP architecture exploration is performed in separate processes which leads to large design time. This paper presents a simple and effective framework to perform the an early automated design-space exploration of the ASIP architecture for the algorithm designer to make right design choices during algorithm development. We propose a novel heuristic algorithm to perform the design-space exploration quickly and combine with a cost model to evaluate the ASIP architecture in terms of area, power and throughput. We perform an evaluation of the proposed framework and determine the time saved by using the design-flow under different scenarios.