ESD Protection in Deep Submicron CMOS Technology - DOes Transient Matter?

Common ESD protection devices have a snap-back characteristic similar to a silicon-control-rectifier. The transient voltage required to trigger these devices usually is not an important design criterion as long as it is not too high. We show that when gate-oxide is thin, this voltage transient creates far more defects in the gate-oxide then the main ESD event clamped at the holding voltage. The consequence is that most existing ESD protection designs will not work in the deep submicron CMOS technology.