Architecture of the Multi-Array Processor (MAP).

MAP (Multi-Array Processor) is a wafer-based high performance multiprocessor architecture for numerical applications. MAP implements a three level control hierarchy, with pipelined processing elements at the first level, a two-dimensional nearest neighbor mesh at the second level, and a few such arrays working out of a shared memory at the global level. MAP is intended to exploit the structured nature of data flow for numerical algorithms for many scientific problems, as well as the implementation advantages of wafer scale integration. Details of the MAP architecture and the intended applications are presented.