Electrical Properties of Cobalt and Copper Contamination in Processed Silicon

The issue of detection and migration of metal contamination during Si wafer processing is crucial for the perfection of 0.18microns manufacturing technology. In these experiments, both Co and Cu were intentionally introduced into Si wafers by two methods; either 1MeV or 60keV ion implantation at doses of 1x10 sup (11) cm sup (-2) -1x10 sup (13) cm sup (-2), or by dipping into a standard Co solution. Quantox, SIMS, TXRF, and DLTS were used to analyze metal migration during furnace heat treatments. Both Co and Cu diffused from the back of the wafers to kill carrier recombination lifetime throughout the bulk Si. P/p+ epitaxial gettered the Co, so near surface lifetime remained high even after contamination. Co diffused through 40A, 100A, or 1000A SiO sub 2 into bulk of Si. However, there was no evidence of Co migration from the surface of wafers to adjoining wafers during furnace anneal, 900C, 30 minutes. Measurements of charge- to- breakdown, Q sub (bd), on fabricated MOS poly-dots before and after Cu and Co backside implant and annealing at either 650C or 1000C, 30 min, showed no changes attributed to metals within the 100A oxides. In addition, metal conamination, introduced either by implantation into the Si or by deposition on the oxide at these levels, did not effect interface state density, D sub (it), or oxide tunneling voltages.