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VLSI Neural Network for Fast Pattern Classification

06 April 1988

New Image

A CMOS VLSI chip has been designed implementing a connectionist neural network model. This design is based on the experience gained with a first chip of a similar type [1]. The new design has been optimized for the fast scanning of images and it will be integrated in a machine vision system. Compared with the first chip it does the computation about ten times faster and it has twice the storage capacity.