Event-EMU: An Event Driven Timing Simulator for MOS VLSI Circuits.

Accurate timing simulations are crucial to the design of MOS VLSI circuits, but can take prohibitively large amounts of time on a typical engineering workstation. This memo describes an event based approach for MOS timing simulation that has proven to be more efficient and reliable than time-step based methods. The MOS network is statically partitioned into groups of strongly coupled nodes called regions. Regions are scheduled for evaluation using a priority event queue. Within regions, the circuit is simulated using relaxation techniques. The simulator has been used to verify the timing and functionality of a number of large (>50K tx.) VLSI chips. Performance is 2 to 5 times faster than time-step based methods and 200-300 faster than circuit simulation.