Ga sub 47 In sub 53 As/InP MISFET with High Transconductance and Transit Frequency

Ga sub 47 In sub 53 As/InP metal-insulator semiconductor FET's are fabricated from epitaxial layers grown by chemical beam epitaxy. The layer sequence is shown in Fig. 1 and consists of an Fe-doped InP substrate, an i-InP buffer layer, a GaInAs layer, which is doped at N sub D=2x10 sup 18 cm sup -3 on a length of 60angstroms, an i-InP layer, and a highly conducting n sup (+)-GaInAs top layer. Electron-beam evaporated SiO sub 2 (300angstroms) is used as a gate insulator. The transistors shown in Fig. 1 have a gate length of 1.2microns (mask dimension 1.0microns), a gate width of 150microns, and a source-drain spacing of 4microns.