Ground Bounce Control in CMOS Integrated Circuits

Ground bounce, the variation of the chip ground relative to the external ground due to the rapid current changes caused by the output buffers, is a major problem in VLSI circuits. A circuit technique is described which equalizes the rise/fall times over the range between processing extremes. Silicon results confirm this design indicating that ground bounce can be reduced by a factor of 2 with a simultaneous decrease in output buffer delay.