HARP - A Hierarchical Approach to Area and Performance Optimization for Multi-Level Logic

We describe a logic optimization system which can be used stand- alone and which serves as the work-horse for three high-level and one RTL level synthesis systems. LOGOPT is capable of sequential and combinational circuit optimaization and is particularly useful for resynthesis of netlists. We will describe the process of re-synthesis with a novel and effective approach to netlist partitioning for selective retention of hierarchy. THis technique is invaluable for high-level synthesis and can also be used for partitioning existing netlists so that troublesome or structured functions such as arithmetic functions can be efficiently implemented either manually or with structured synthesis techniques and LOGOPT can optimize the gluelogic. We will describe this technique. We will also describe the some ideas used in netlist verification. The architecture of LOGOPT will be described and data on the use of LOGOPT over a spectrum of actual designs will be presented.