Hierarchical mixed mode VLSI module assembly in PANDA.

This memorandum describes the algorithm used by PANDA, and IMAGES based hierarchical VLSI module assembler. PANDA was developed as a test bed for exploring new VLSI design methodologies and tools. Although a "sliced" structure is a sufficient description for the Hierarchical input, it is not required. Each hierarchical cell of the structure is required to have subcells connected to only one neighbor per side, similar to, although not the same as, tiling. PANDA, uses Pitchmatching AND Abutment as the primary assembly technique, and features depth first searching, constraint resolution, IMAGES PACKAGES, and wire length minimization to minimize layout area, while maintaining the input hierarchy. PANDA uses many of the features of the constraint based IMAGES symbolic design language and requires circuits to be described in IMAGES. PANDA has been designed to use either MACS or IBIND as the leaf cell compactor and can assemble a mixture of fixed grid and symbolic grid cells. (mixed mode).