High Performance Complementary Silicon Bipolar Process: Part 1. An Overview.

A novel complementary silicon bipolar process has been developed specifically for high performance 5 V analog and mixed analog- digital applications. The process yields very fast substrate isolated pnp transistors (f sub T~7.8 GHz) and npn transistors (f sub T~16 GHz). A selective epitaxial growth (SEG) technique is used to achieve compact and planar dielectric component isolation. Rapid thermal anneal (RTA) and low temperature dielectrics became necessary for reducing the processing temperatures. A two level gold metallization is used for a proven highly reliable interconnection scheme.