High sensitivity decision circuit: design, packaging and application in optical experiments

The high-input-sensitivity decision DFF IC was designed and fabricated in a self-aligned InP DHBT technology. Circuit measurements at 40-43 Gbit/s show excellent eye quality, 30 mV sensitivity and good clock phase margin. The optical receiver experiment using this decision DFF for 40 Gbit/s NRZ (full-rate) data is also presented.