Post-layout verification of the WE DSP32 digital signal processor.

This paper presents a case study of the application of new CAD tools to the DSP32 digital signal processor. Full custom circuit design was used throughout the DSP32 to meet the performance and area objectives. Special attention to design verification was therefore required. As a result of the work described in this paper, numerous design errors were caught and corrected before first silicon. This work also stimulated the improvement of the CAD tools themselves. Problems which escaped detection are also discussed and future directions are proposed.