Static Model Analysis of UML/SysML Diagrams for System-Level Design of 5G Systems

The architecture of future 5G Radio Access Networks will support functional splits where servers offload lowlevelsignal-processing functions (e.g., physical and datalink layer) to accelerators (e.g., FPGAs, GPUs). In this context, the efficient programming of these platforms requires skills in both embedded systems and IT. Design automation approaches for embedded systems based on UML/SysML are a promising solution as UML/SysML adopt concepts and techniques that are well known in the domain of software development. In this paper, we propose an approach for the compilation and the static analysis of UML/SysML diagrams that generate optimized executables for signal-processing systems. We demonstrate the effectiveness of our solution on the model-based design of a 5G data-link layer decoder, as defined in Release 14 by the 3GPP consortium, for the single antenna case, in the uplink (SC-FDMA), eNodeB side. For this case study, our compiler achieves a memory footprint reduction of 72.7% with respect to pure translation approaches.