Utilization of AT&T 5ESS(R) Switch Central Office Field Data to Provide a Basis for Ongoing Design Improvements

Determining the reliability of electronic circuit packs has been hampered by the difficulty of collecting accurate field performance data, and implementing improvements identified during the resulting reliability analysis back into new hardware design. Additionally, reliability information must be transformed into managerial information that provides input for thoughtful and accurate managerial and engineering decisions and solutions. This paper explains reliability procedures utilized by AT&T Bell Laboratories in the collection of circuit pack field data, the calculation of circuit pack Failure-In-Time (FIT) rates, and the use of Pareto and statistical process analysis in identifying hardware design areas to target for reliability improvements.