Wafer Level System Integration: A Review.

01 January 1989

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Wafer scale integration, having endured several early and notorious commercial failures, has recently received increasing attention as an important, longer term evolutionary direction for silicon integrated circuits. This review highlights the major directions and issues impacting not only monolithic wafer scale circuits but also hybrid "wafer scale" circuits, i.e. mounting pretested chips on silicon wafer circuit boards. An extensive set of references is provided to avoid repeating excessively detailed discussions available in the cited literature. Instead a broad overview of the objectives and motivations of the considerable work on wafer level system components is provided.