Wafer Scale Integration for Rad Hard Systems
07 October 1988
AT&T demonstrated that its wafer scale integration interconnect technology exceeds level H requirements for Gamma radiation. This technology has been successfully demonstrated with substrate areas of 16 square centimeters and can currently support designs up to 49 square centimeters. This technology is based on a silicon flip chip hybrid process which offers a total of 4 levels of interconnect plus dedicated power and ground planes.