Fast LDPC GPU Decoder for Cloud RAN

The GPU as a digital signal processing accelerator for cloud RAN is investigated. A new design for a 5G NR low density parity check code decoder running on a GPU is presented. The algorithm may be flexibly adapted to GPU architecture to achieve high resource utilization as well as low latency. It improves over an existing layered design that processes additional codewords in parallel to increase utilization. In comparison to a decoder implemented on a 757K gate FPGA, a moderate sized 24 core GPU decoder has 3 times higher throughput. Typical of general-purpose processors, the GPU decoder exhibits lower decoding power efficiency. The FPGA decoder is found to be 5 times more efficient. Hence GPUs may find application as cloud accelerators where rapid deployment and flexibility are prioritized over raw decoding efficiency.