Integrated Circuit SNR Improvement using Dielectric Altering Compound, Laser Trim and FIB System

Communication Signal Processors (CSP) did not have the Signal-to-noise ratio (SNR) performance expected. Significant differences were noticed between SNR values at wafer level and package testing. The analog section of the chip was suspect as the problem existed at the A to D conversion level. A Dielectric Altering Compound (DiAC) was chosen to simulate the packaged configuration in the decapsulated parts. The DiAC was applied in and around the Analog section, after application in other areas did not show the SNR degradation. The sampling capacitors in the A to D Converter section (ADC) of the chip were selectively coated with DiAC and laser trimmed to identify the offending circuit element. A signal trace running adjacent to the sampling caps, was isolated and suspected of coupling noise to the sampling caps. A FIB system was used to shield the suspect runner on a packaged part. Subsequent testing showed no degradation. This procedure was successful in isolating, verifying and rectifying the SNR degradation. This degradation was found on more than one code, and this procedure was used successfully on subsequent errant codes. Finally, a mask fix on Silicon got the desired SNR performance for all codes.