Integrated network barriers

Integrated Network Barriers (INBs) are a network protocol for parallel processors. INBs are both pipelinable and have low latency. In this paper, we show that INBs implement barriers-which ensure that all prebarrier operations of any processor appear to complete before any post-barrier operations-and we show how to construct efficient, deadlock-free barriers for any interconnection network and routing function which has an acyclic queue dependency graph. As a special case, INBs can be implemented for any network and routing function for which there exists an acyclic channel dependency graph.