Internal Thermal Resistance of a Multi-Chip Packaging Design for VLSI-Based Systems

A heat transfer study has been conducted for the steady state internal thermal resistance of a multi-chip packaging design for VLSI based systems. This package has three VLSI devices flip-chip bonded and interconnected on a silicon substrate that is attached to an aluminum heat sink. Solder bumps, thermal vias and an air gap are the key thermal dissipation elements of the package.