Multiplexing and DQPSK Precoding of 10.7-Gb/s Client Signals to 107 Gb/s Using an FPGA
24 February 2008
We implemented a real-time DQPSK precoder for 107-Gb/s data, together with a high-speed channel alignment scheme and the required rate adaptation from 10.7 Gb/s to 13.375 Gb/s, on a Xilinx Virtex II Pro X FPGA.
