New High-Voltage PMOS Transistor Structure

Present HV-PMOS structures requires a low-doped drain formed by an etch and an implant of boron (for BCDMOS technology.) However, the etch leaves a gap underneath the poly gate thereof, causing reliability problems. The new HV-PMOS structure has two levels of poly, the lowest poly (POLY- 1) is disposed away from the drain region such that etching can occur away from the POLY-1 gate and no undercutting occurs. After the creation of the drain region, more gate oxide is formed and a second poly gate (POLY- 2) is deposited overlaying the POLY-1 gate and the drain region. The POLY-1 and POLY-2 gates are then interconnected to form the gate of the HV-PMOS transistor.