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    On The Relationship Between Area Optimization and Multifault Testability of Multilevel Logic (NOT KNOWN IF PUBLISHED BECAUSE AUTHOR HAS LEFT AT&T)

On the Relationship Between Area Optimization and Multifault Testability of Multilevel Logic (NOT KNOWN IF PUBLISHED BECAUSE AUTHOR HAS LEFT AT&T)

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In this paper we present a number of results exploring the relationship between area optimization of combinational logic circuits and the testability of those circuits. We begin with two level networks and give a new proof that complete single fault testability for two level networks implies complete multi-fault testability for those networks. Furthermore, we show for prime and irredundant 2-level networks that a complete set of test vectors always exists in the ON-set distance-1 from the OFF -set or in the OFF -set distance-1 from the ON -set.