Optical sensitivity of integrated PIN-Detector-Amplifier.

In the early stage of development of an integrated InGaAs PIN- FET technology it is necessary to keep the design simple, which implies that the device will consist of a single stage, low gain amplifier. We present design criteria for such an amplifier, and show that the transimpedance configuration provides better sensitivity than a voltage amplifier, even when the gain of the amplifier is very small. We also show that the gate capacitance (i.e. width) of the input FET which optimizes the sensitivity is much smaller when the amplifier gain is low than it is in the high gain limit.