Performance Evaluation of Simple Loss/Delay Priority Schemes for ATM Switch Design

We report simulation results illustrating the performance benefits associated with threshold-based loss priority schemes and service class-based delay priority schemes for a shared memory ATM DMUX with a Hierarchically Growable Architecture. We carried out this study for a set of realistic traffic sources. Our simulation results show that good quality of service discrimination between groups of CBR and VBR sources in a mixed traffic scenario is feasible by just using a few levels of loss/delay priority service discriminators