Rapid Prototyping for a High Data Rate Wireless Local Loop

The development of a prototype for a fixed wireless loop system is reported. The TDMA based communication system allows flexible modulation schemes between QPSK and 64QAM in order to allow for dynamic bandwidth allocation. It is estimated that the overall complexity of the prototype is of the order of 10-100GOps. Since such a large complexity cannot be provided by existing DSPs, our prototype consists of a fast DSP, accompanied by several Altera Flex10K FPGAs. Complexity intensive algorithms are first evaluated on the DSP then moved onto the FPGAs in order to lower the load on the DSP. Such a structure allows very flexible reprogramming in C of initial algorithmic ideas and can be used to compare performance as well as validate the implemented algorithms.