Subthreshold conduction of vertical DMOS and CMOS transistors in high voltage BCDMOS technology.

The subthreshold conduction behavior of vertical DMOS and CMOS devices in the dielectrically isolated BCDMOS (Bipolar-CMOS- DMOS) technology have been characterized and theoretically analyzed by an approximate model. The measured data are consistent with the simple model. And the unique and inherent structure advantages of DMOS devices in terms of absence of the short- channel effect and punch-through characteristics are demonstrated and analyzed.