Synthesis and characterization of high quality stacked SiO sub 2 thin gate dielectrics.

This memorandum describes a novel method of fabricating thin (75-250angstroms) multilayered stacked oxide structure with superior electrical and substructural properties. The synthesis of these composite oxides consist of a three-step process sequence of frowing-depositing-and- growing SiO sub 2 layers on silicon substrates by thermal oxidation, LPCVD deposition and densification oxidation, respectively. These stacked oxides have ultralow defect density (D sub o 0.25 cm sup -2) with excellent breakdown (F sub bd > 13 MV cm sup -1) and well behaved Si/SiO sub 2 interfacial characteristics. The drastic lowering of D sub o results from the concept of misaligning the micropores and other interconnecting defects within the oxide layer across the virtual interface between the thermally grown and LPCVD deposited SiO sub 2 layers.