Synthesis of a new manufacturable high-quality graded gate oxide for sub-0.2 mu m technologies

Graded gate oxide process involves a two-step synthesis of growing an oxide at a temperature above the viscoelastic. temperature (T-VE) onto a pregrown low temperature thermally grown layer SiO2 layer to form a composite graded SiO2 structure. The cooling rate is carefully modulated near T-VE similar to 925 degreesC to enhance growth induced stress relaxation. The pregrown SiO2 layer provides grading and is a sink for stress accommodation for the final high temperature SiO2 forming the interface. Both grading and modulated cooling generate a strain-free and planar Si/SiO2 interface. Such an interface delivers significant enhancement in all aspects of device reliability and performance. These oxides are of very high-quality, robust, and manufacturable with a process capability index, C-pk > 1.5. Graded gate oxide is already in the primary path of our 0.16 mum and 0.12 mum technologies.