TBD prediction from low-voltage near-interface trap-assisted tunneling current measurements

In this paper, we present a new method to predict oxide breakdown directly from measurements at low voltage and room temperature, therefore without the need for any voltage/field extrapolation. Previously, it has been shown that in ultrathin oxide (tox2 nm) MOS devices with high substrate doping (NA >1018 cm-13) a current component of cathode electrons tunneling into anode near-interface traps (TNIT) is present when the applied voltage is between zero and the flat-band voltage. Here, we show that there is a correlation between this TNIT component and oxide breakdown. Then, we introduce a new method exploiting this correlation to predict oxide lifetime from stress measurements at the real operation conditions without any questionable voltage/field extrapolation. The results are consistent with other extrapolation techniques. However, the present methodology is particularly suitable for TBD characterization of future technologies since, as the scaling process continues, TNIT will be more and more important and visible, while the traditional techniques to assess oxide defects (like capacitance-voltage (C-V) or stress-induced leakage current (SILC) measurements) or to directly detect breakdown will become less feasible