Test Generation for Sequential Circuits Using Threshold-Value Simulation.

Conventional approaches to sequential circuit test generation have two major difficulties: 1) Backtracking in space and time results in high complexity, and 2) Tests generated by neglecting circuit delay cause races and hazards even in the fault-free circuit. In our recent work, a simulation-based directed search approach for generating test vectors for combinational circuits was proposed. In this method, the search for a test vector is guided by a cost function computed by the simulator. Event-driven simulation deals with circuit delays in a very natural manner. Signal controllability information required for the cost function is incorporated in a new form of logic model called the threshold-value model.