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    The Architecture, Instruction Set, and Development Tools For a 60ns DSP (NOT KNOWN IF PUBLISHED BECAUSE AUTHOR HAS LEFT AT&T)

The Architecture, Instruction Set, and Development Tools for a 60ns DSP (NOT KNOWN IF PUBLISHED BECAUSE AUTHOR HAS LEFT AT&T)

28 April 1987

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This paper reviews the architecture and instruction set of the WE DSP 16 Digital Signal Processor, a 16-bit, high performance, low power, CMOS integrated circuit. An application example using the DSP 16 instruction set highlights the key features of the DSP 16 architecture, illustrating speed, memory efficiency, and ease of application development. Finally, software and hardware development tools for the devices are described.