The Effect of Deposition Temperature on Grain Structure and Electrical Properties of Amorphous and Polycrystalline Silicon Fabricated by Rapid Thermal Chemical Vapor Deposition for the Application fo CMOS Gate Electrodes

In this work, we have studied the effect of deposition temperature on amorphous and polycrystalline silicon grain structure, electrical properties, and transistor characteristics. Amorphous and polycrystalline silicon were deposited at various temperatures from 610 degrees C to 710 degrees C by rapid thermal chemical vapor deposition (RTCVD). As deposited and after anneal samples have been studied by X-ray diffraction (XRD), secondary ion mass spectrometry (SIMS), and transmission electron microscopy (TEM). For samples deposited at 610 degrees C and 680 degrees C, after annealing, 40-50% of the crystal is oriented to (111) direction, samples deposited at 710 degrees C, the preferred orientation is (220). Sub-micron CMOS transistors have been fabricated. Transistors drive current, off current, and threshold voltage have been compared with different deposition temperatures, all cells have the similar transistor characteristics. Channeling effects have been investigated by comparing threshold voltage uniformity, and threshold voltage uniformity is not dependent by the Si deposition temperatures.