The Jitter Performance of Phase-Locked Loops Extracting Timing From Baseband Data Waveforms

To decode a baseband data waveform, a clock signal giving the proper sampling time must be available. Pilot tones are sometimes transmitted along with the data waveform for this purpose but, alternately, timing can be derived directly from the data waveform itself. One approach to self-timing is to let the data waveform passed through a memoryless nonlinearity ring a tuned circuit with a resonant frequency close to the nominal signaling rate. 1-8 Another technique, which in general involves more circuitry but gives superior performance, is to use a phase-locked loop (PLL). The element of a PLL extracting symbol timing that is most interesting functionally is its phase comparator. Numerous realizations are possible. Almost all these realizations are similar, however, in that they only produce an error signal when a data transition occurs. The gating of the error signal by data transitions in a PLL extracting symbol timing makes the analysis of such a PLL potentially quite different from the analysis of phase-locked loops used in other applications. For purposes such as studying timing acquisition, the effect of transition gating is adequately modeled as a multiplication of the 37