Publications

The proposed paper describes a single chip implementation of an 8.0 Kbps Codebook Excited Linear Prediction (CELP) coder on a single floating point AT&T DSP32C digital signal processor.

The High-Frequency (HF) band has increased in popularity in recent years.

This paper discusses the design, implementation, and deployment of a secure and practical payment system for electronic commerce on the Internet.

The proposed paper describes a single chip implementation of an 8.0 Kbps Codebook Excited Linear Prediction (CELP) coder on a single floating point AT&T DSP32C digital signal processor.

The High Density Packaging Users Group conducted a substantial study of the solder joint reliability of high-density packages using lead-free solder.

In this article, we present the modelling, design and characterization of a 3-Vppd linear-output-swing 90-GBd PAM-4 modulator driver, realised in III-V Lab's in-house 0.5-?m InP DHBT technology (38

In this article, we present the modelling, design, fabrication and characterization of a 3-Vppd linear-output-swing 90-GBd PAM-4 modulator driver, realised in III-V Lab inhouse 0.5-um InP DHBT tech

The precise measurement of an angle is a basic operation in many technical fields.

In this paper, we present the design, process and characterization of an AWC bused on a SiGe graded index waveguide plateform, operating at 4.5μm (2180-2280cm-1).

SUMMARY: PROVE (PROlog based VErifier) is a rule based system that formally verifies functional correctness of circuits.