A new VLSI implementation of a 2-D Discrete Cosine Transform (DCT) using planar rotations has been carefully simulated at the logic level on real image data.
Many computer systems today need to operate with high availability. These include web servers, network and telephony devices such as routers and switches, e-commerce applications, and many others.
T HE author was led to the study given in this paper from a consideration of large scale computing machines in which a large number of operat'ons must be performed without a single error in the end
In this paper, we derive the random coding error exponent, or reliability function, for flat Nakagami fading channels with receiver antenna diversity.
A class of codes is said to reach capacity $cC$ of the binary symmetric channel if for any rate $R0$ there is a sufficiently large $N$ such that codes of length $ge N$ and rate $R$ from this class
The error performance of fixed access and home (FAaH) technologies is an important physical layer (PHY) characteristic that has strong impact on the end-user's experience.
This paper investigates error performance issues concerning Asynchronous Transfer Mode (ATM) networks. ATM is being proposed as a transport mechanism for Broadband ISDN (B-ISDN) networks.
Optimum demodulation of intersymbol interference ma be performed using maximum-likelihood sequence estimation receivers.
Satellites are expected to play an important role in the emerging ISDN, particularly in the international environment.
In this contribution we show that the word error rate (WER) performance in the waterfall region of a randomly shortened and punctured low density parity check (LDPC) code can be accurately predicte
