In this paper, a fully integrated 40-Gb/s clock and data recovery (CDR) IC with additional 1:4 demultiplexer (DEMUX) functionality is presented.
A fully integrated dual-frequency VCO for 5.2/5.8-GHz wireless LAN providing not only a high frequency LO signal to transceiver mixers but also a half-LO-frequency signal to a PLL is described.
A fully integrated VCO with dual frequencies at 3.5 and 7 GHz for mixers and PLL are described. The circuit has 1.2 GHz tuning range at 7 GHz and 25 dBc 3.5-GHz signal leakage to 7-GHz port.
Advanced SiGe BiCMOS and CMOS processes continue to push the frontier on millimeter-wave (mm-wave) and highly integrated phased-array systems for a variety of communication applications [1,3].
Digital telecommunication and other lightwave applications require laser modules with broadband characteristics.
We describe a systolic architecture for the accessing blocks of memory.
A 40 Gb/s clock and data recovery (CDR) IC with 1:4 demultiplexer (DEMUX) is fabricated in a SiGe technology.
A 0.25 μm CMOS IC contains all analog and digital electronics required for a point-to-multipoint Bluetooth node.
This single-chip RF-transceiver for DECT provides a complete transmission and reception radio interface between the antenna and the baseband digital bitstream.
We demonstrated a fully-packaged dual-fiber 3D-waveguide (3DW) spatial multiplexer, which has 7dB mode-dependent loss (MDL) and ;8dB insertion loss in a multiplexer/demultiplexer pair.
