Publications

This paper presents a unified test data compression approach, which simultaneously reduces test data volume, scan power consumption and test application time for a system-on-a-chip (SoC).

The TD-3 test equipment for routine maintenance and troubleshooting procedures is designed to match the high performance of the TD-3 system and is simple and convenient to operate.

It became apparent early in the development program for the TH radio system that to operate the system in the field and to attain its high performance objectives would require the regular use of ac

A comprehensive test environment is important in the development and maintenance of any large computer system.

This paper presents a new approach to detecting faults in interconnects; the novelty of the proposed approach is that test generation and scheduling are established using the physical characteristi

This paper proposes two techniques to generate test sequences to check the conformance of an implementation of a feature- rich communication system to its specification, as well as to detect the in

We describe a new reverse simulation approach to analog and mixed-signal circuit test generation that parallels digital test generation.

Conventional approaches to sequential circuit test generation have two major difficulties: 1) Backtracking in space and time results in high complexity, and 2) Tests generated by neglecting circuit

The bit error rate of a transceiver is often limited by the analog front end.

Many integral equations for numerically predicting pair correlation functions g sup (2) in classical fluids have been proposed, each based on its own "closure approximation".